|
CISC |
RISC |
|
Complex in instruction set |
Reduced instruction set |
|
Large instruction set |
Modest instruction set |
|
Memory access is available to most instructions |
Memory access is only to load and store instructions |
|
Has few registers |
Has a large number of registers |
|
More addressing modes |
limited addressing modes |
|
instructions are encoded at varied length |
instructions are encoded at fixed length |
|
Microcode control logic i.e. non-volatile memory holds
logic codes that implement the instructions |
Control logic is hard wired using logic gates that is
more efficient |
|
Examples intel core |
Example ARM |
Tuesday, July 23, 2024
What is the difference between RISC and CISC architecture
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